As complexity increases and the industry increasingly shifts away from ASICs to SoCs, the concept of coherency is beginning to look more like a stack of issues than a discrete piece of the design.

System-Level Design sat down to discuss coherency with Mirit Fromovich, principal solutions engineer at Cadence; Drew Wingard, CTO of Sonics; Mike Gianfagna, vice president of marketing at Atrenta, ...

Driving individual processor performance to the limit in a given implementation technology is never easy or efficient. Faster clocks, deeper pipelines and bigger caches carry silicon area and power ...

Managing a cache so that data are not lost or overwritten. For example, when data are updated in a cache but not yet transferred to the target memory or disk, the chance of corruption is greater.

Although snoopy virtual-bus approaches are the first step, hybrid snoopy-directory schemes will be the next trend in embedded coherence. Without a doubt, embedded systems-on-a-chip (SoCs) are becoming ...

XLR8, a manufacturer of Mac multiprocessor upgrades and expansion products, has posted a white paper that releases into the public domain information allowing a manufacturer to enhance current Power ...