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Samsung touts 96% lower-power NAND design — researchers investigate design based on ferroelectric transistors
Samsung researchers have published a detailed account of an experimental NAND architecture that aims to cut one of the technology’s largest power drains by as much as 96%.
A technical paper titled “Logic-in-Memory Operation of Ternary NAND/NOR Universal Logic Gates using Double-Gated Feedback Field-Effect Transistors” was published by researchers at Korea University.
NAND Flash is a type of non-volatile memory technology that has revolutionized data storage in the digital age. It is a form of flash memory, which means it can be electrically erased and reprogrammed ...
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